Prior microwave devices include resistors, series shunt elements, and solid-state devices such as Schottky diodes, PIN diodes, varactor diodes, and transistors. In the prior art, four diodes are at times put in one package to form a bridge quad, also known as a sampling bridge. Four diodes are also packaged in the prior art to form a ring quad, also called a quad-ring configuration.
Certain prior microwave devices use beam leads on the tops of the devices to provide connections from the devices to external circuitry. The beam leads for said devices are structurally supported by the diodes of the devices themselves. For example, FIG. 1 illustrates a certain prior microwave diode 2 with a beam lead 4 attached to an anode 5 on the top of the diode 2, and a beam lead 6 attached to a cathode 7 on the top of diode 2.
On certain other prior microwave devices, the beam leads not only provide external connections to such devices, but the beam leads also provide interconnections on the tops of said devices between various terminals of said devices. Again, the beam leads are structurally supported by the bodies of said microwave devices. For example, on certain prior ring quads, the beam leads reside on the tops of the ring quads and provide interconnections between the anodes and cathodes of the respective diodes of the respective ring quads. The beam leads on said prior ring quads also act as "flying" leads to provide connections to external circuitry. The flying beam leads are structurally supported by the diode blocks of said prior ring quads. A glass layer is used in each of certain of said prior ring quads to hold the four diode blocks of the ring quad together.
Certain prior microwave devices with beam leads have certain disadvantages. One disadvantage is the relatively fragile construction of certain prior microwave beam lead devices. Certain prior beam lead devices have relatively low maximum tear strengths. The fragility follows from the fact that the beam leads are attached to the terminals at the top of the devices and from the fact that the beam leads act as large lever arms relative to the small devices.
Another disadvantage of certain prior microwave beam lead devices is their relatively high thermal impedance. In certain such prior devices, heat generated in the device junctions is transferred through small leads to the heat sink. The small size of the leads results in relatively high thermal impedance and reduces the potential power handling capacity of said devices.
Moreover, power dissipation is further constrained in certain such prior devices by the fact that having only connections to the tops of the devices and not to both the tops and bottoms of the devices means that power is not dissipated efficiently throughout the full three-dimensional volumes of the devices. In other words, power is dissipated across portions of said devices rather than efficiently fully through such devices.
Another disadvantage is that certain prior beam lead microwave devices require relatively tedious and delicate assembly operations. Capacitance, inductance, and balance problems can arise from improper bonding of the beam leads. The beam leads for the devices do not always seat properly during packaging. The relatively large beam leads are prone to bending, which can result in capacitance, inductance, and balance problems. Dynamic resistance problems can also arise. Certain prior beam lead devices are typically mounted face down, which can cause inspection problems.
Yet another disadvantage of certain prior beam lead devices is the relatively high inductance associated with the geometric discontinuities between the beam leads and the metallic structures on top of those devices.
FIG. 2 illustrates an electrical schematic of one prior art bridge quad configuration 31 that includes diodes 33, 35, 37, and 39. External connections are made at points 41, 43, 45, and 47 of bridge quad configuration 31. Bridge quad configuration 31 can be used for full-wave rectification, for example.
FIG. 3 illustrates an electrical circuit schematic of one prior art ring quad 10. The cathode of diode 12 is electrically connected to the anode of diode 14 via lines 24 and 26. The cathode of diode 14 is electrically connected to the anode of diode 16 via lines 28 and 30. The cathode of diode 16 is electrically connected to the anode of diode 18 via lines 32 and 34. The cathode of diode 18 is electrically connected to the anode of diode 12 via lines 36 and 22.
The ring quad 10 shown in FIG. 3 can be used in a double-balanced mixer. Flying leads 21, 23, 25, and 27 connect to circuitry 10 at points 11, 13, 15, and 17, respectively. Flying leads 21, 23, 25, and 27 connect to other circuitry (not shown) that uses ring quad 10 in a well-known manner. Such other circuitry could include coupling transistors (not shown), for example.
Good balance is a desirable characteristic of a mixer. To get good balance, the capacitance of each diode in the mixer should be approximately equal. In addition, the inductance of each diode in the mixer should be approximately equal. In other words, the capacitances of diodes 12, 14, 16, and 18 should be approximately equal. In addition, the inductances of diodes 12, 14, 16, and 18 should be approximately equal.
In an early prior art ring quads, wires were used as lines 24, 26, 28, 30, 32, 34, 36, 22, 21, 23, 25, and 27 to provide respective connections to diodes 12, 14, 16, and 18. Such prior art ring quads with wires often exhibited high capacitance, high inductance, and poor balance.
FIG. 4 is the top view of prior art ring quad 50 with beam leads 51, 53, 55 and 57. Beam leads 51, 53, 55, and 57 act as the flying leads for ring quad 50. In packaging prior art ring quad 50, ring quad 50 is turned upside down and beam leads 51, 53, 55, and 57 are welded to respective leads of a lead package (not shown). Ring quad 50 and the lead package (not shown) can be epoxy encapsulated or placed in a ceramic package.
Blocks 52, 54, 56, and 58 are the four diodes of ring quad 50. Diodes 52, 54, 56, and 58 are each Schottky-barrier diodes. For diode 52, a metal-semiconductor junction lies under anode 79. Metal interconnecting structure 71 connects anode 79 to cathode 63. Cathode 63 is a well or depression in which metal reaches down to contact a layer of N+type silicon. Similarly, metal interconnecting structure 73 connects anode 81 with cathode 65 of diode 56. Metal interconnecting structure 75 connects anode 83 of diode 56 to cathode 67 of diode 58. Likewise, metal interconnecting structure 77 connects anode 85 of diode 58 to cathode 61 of diode 52.
A thin layer of glass 59 structurally holds ring quad 50 together. That is, glass 59 holds diodes 52, 54, 56, and 58 together. Leads 51, 53, 55, and 57 reside above glass 59. In certain other prior art ring quads (not shown), the glass holding the diodes together (i.e., the glass corresponding to glass 59) extends beyond the outer perimeter of the diodes (i.e., extends beyond the outer perimeter or edges of the diodes corresponding to diodes 52, 54, 56, and 58).
In prior art ring quad 50, diode block 52 has to be large enough to support flying beam lead 51. Likewise, diode blocks 54, 56, and 58 must be large enough to structurally support respective beam leads 53, 55, and 57.
FIG. 5 is a cross-sectional side view of ring quad 50 of FIG. 4 taken along line 3--3 of FIG. 3. In FIG. 5, it can be seen that beam lead 57, cathode 67, and interconnecting structure 75 are one piece of metal. At anode 83, a metal-semiconductor junction is formed between Schottky-barrier metal layer 103 and N.sup.- type silicon layer 99. The metal can be titanium, for example. Metal interconnecting structure 75 connects anode 83 with cathode 67. Cathode 67 is comprised of an ohmic contact metal layer with a layer 68 of gold on the top. The metal can be titanium, for example. The metal of cathode 67 contacts from the top surface to layer 91 of N.sup.+ type silicon by contacting down into a well or depression, as shown in FIG. 5. The metal outside of the well or depression of cathode 67 becomes lead 57 or interconnecting structure 75. Layer 93 is a layer of N.sup.- type silicon above layer 91. Layer 95 is a oxide layer above layer 95.
Likewise, for diode block 56, cathode 65 is comprised of an ohmic contact metal layer with a layer 66 of gold on top. The metal can be titanium, for example. The metal of cathode 65 contacts from the top surface to layer 97 of N.sup.+ type silicon by contacting down into a well or depression, as shown in FIG. 5. The metal outside of the well or depression of cathode 65 becomes lead 55. Layer 99 is a layer of N.sup.- type silicon above layer 97. Layer 101 is a layer of oxide above layer 99.
Layer 59 is a thin layer of glass holding diode blocks 52, 54, 56, and 58 together. Glass layer 59 is typically 18-20 microns thick or approximately two-thirds of a mil thick. The metal leads, including lead 57, are typically about one-half of mil thick. The spacing between the diode blocks, including diode blocks 56 and 58, is typically about 3.5 mils. The combined depth of layers 99 and 97 is typically 2.5 mils.
FIG. 6 is the bottom view of prior art ring quad 50 shown in FIG. 4. Again, diode blocks 54, 52, 58, and 56 are held together by glass 59. Leads 51, 57, 55, and 53 can be seen in part in FIG. 6. Meatal interconnecting structure 71, 77, 75, and 73 reside on the other side of glass 59.
FIG. 7 is an pictorial view of prior art ring quad 50 of FIG. 4. As shown in FIG. 7, the flying beam leads 51, 53, 55, and 57 as well as the metal interconnecting structures 71, 73, 75, and 77 all reside on the top of ring quad 50. Thus flying leads 51, 53, 55, and 57, together with interconnections 71, 73, 75, and 77, substantially reside in a two dimensional plane, or, in other words, in two-space. Moreover, the connection of the flying leads 51, 53, 55, and 57 to diodes 52, 54, 56, and 58 of prior art ring quad 50 is quite similar to the way flying leads 21, 23, 25, and 27 are connected to diodes 12, 14, 16, and 18 of prior art ring quad 10 of FIG. 2.
Because flying leads 51, 53, 55, and 57, together with interconnections 71, 73, 75, and 77, approximately reside in a two-dimensional plane, power is not dissipated efficiently throughout the full three-dimensional volume of each diode. In other words, power is dissipated across a portion of each diode of prior art ring quad 50 rather than efficiently fully through each diode. This is especially the case if a signal has a fast rise time, because there is not enough time for the energy to dissipate efficiently throughout the entire volume of diodes 52, 54, 56, and 58 of prior art ring quad 50.
Moreover, given that connections 51, 53, 55, and 57 are made only to the tops of the diodes and that cathode/anode pairs 61/79, 63/81, 65/83, and 67/85 reside relatively close together, pulse transients can sometimes result in carbon trails reaching or jumping from the cathodes to the anodes. Such carbon trails can destroy the cathode/anode topography of prior art ring quad 50.
An additional disadvantage of prior art ring quad 50 is that forming an efficient doubly double-balanced mixer (comprised of eight diodes) in three-space is difficult given that (1) the leads interconnecting the anodes and cathodes of each ring quad and (2) the flying beam leads of each ring quad all reside on the top of each ring quad.
As seen in FIG. 7, each of the diode blocks 52, 54, 56, and 58 has an upper oxide layer, a middle N.sup.- type silicon layer, and a lower N.sup.+ type silicon layer. Diode block 52 has an upper oxide layer 125, a middle N.sup.- type silicon layer 123, and a lower N.sup.+ type silicon layer 121. Diode block 54 has an upper oxide layer 131, a middle N.sup.- type silicon layer 129, and lower N.sup.+ type silicon layer 127. Diode block 56 has an upper oxide layer 101, a middle N.sup.- type silicon layer 99, and a lower N.sup.+ type silicon layer 97. Diode block 58 has a upper oxide layer 95, a middle N.sup.- type 93, and a lower N.sup.+ silicon layer 91.
Cathode wells 61, 63, 65, and 67 are shown in FIG. 7 extending down to respective N.sup.+ layers 121, 127, 97, and 91. Leads 51, 53, 55, and 57 each have a semicircular indentation around anodes 59, 81, 83, and 85. This semicircular indentation or curvature allows the cathode to be close to the anode and at the same time helps to reduce the Faraday effects that result from sharp edges.
Glass 59 resides in a well, or etched pit, in diode blocks 52, 54, 56, and 58.
In fabricating prior art ring quad 50, an oxide layer is first formed on top of a thick wafer of silicon. The silicon has an N.sup.- type layer below the oxide and a N.sup.+ type layer below the N.sup.- layer. A mask, or pattern, is then applied to the front oxide layer. The oxide is then etched away according to the pattern. A relatively large area is etched to provide a location for glass. Oxide islands or mesas are left after the etching process. Glass fill is applied. The glass is heated and flows across the top of the ring quad and resides in the etched areas for the glass.
Deep etches are made into the silicon to form cathode wells. Smaller openings are etched through the oxide to form anodes.
A first layer of metal is deposited by metal deposition in a high-vacuum system to the top of the wafer. A second layer of metal is then deposited by metal deposition in a high-vacuum system over the first layer of metal. The first layer of metal can be titanium, for example, and the second upper layer of metal can be gold.
The first layer of metal enters the cathode wells or depressions during deposition such that the first layer of metal contacts the N.sup.+ layer of silicon to form cathodes. The first layer of metal also enters the anode openings during deposition such that the first layer of metal contacts the N.sup.- layer of silicon to form anodes. The first layer of metal in the anode openings acts as the metal-semiconductor injunction for each of the anodes.
A leads and interconnecting structures are defined on the top of the silicon wafer by using common masking and metal etching techniques. The plated leads and interconnecting structures are defined such that metal runs out of cathodes 61, 63, 65, and 67 to form respective leads 51, 53, 55, and 57 and interconnecting structures 71, 73, 75, and 77.
The silicon wafer is then etched from behind in order to form diode blocks 52, 54, 56, and 58. In order to package the prior art ring quad, the prior art ring quad is turned upside down and beam leads 51, 53, 55, and 57 are welded to respective leads of a lead package (not shown). Ring quad 50 and the lead package (not shown) can be epoxy encapsulated or placed in a ceramic package.
Beam leads 51, 53, 55, and 57 of prior art ring quad 50 do not always seat properly during packaging. The relatively large beam leads 51, 53, 55, and 57 are also prone to bending, resulting in capacitance, inductance, and balance problems. Resistance problems can also arise from the welding operation.
Prior art ring quad 50 can be fragile given (1) that a relatively thin layer of glass 59 is used to hold the four diodes 52, 54, 56, and 58 together and (2) that the flying beam leads 51, 53, 55, and 57 present a relatively large lever arm to the top of ring quad 50.